Showing posts with label ARM SVE anouncment. Show all posts
It looks like Intel (NSDQ:INTC) has finally realized the potential of ARM
(NSDQ:ARMH) business prospects. The chipzilla entered into a licensing
agreement with ARM last week, which allows it to manufacture ARM-based mobile
SoCs for fabless chipmakers such as Qualcomm, Apple and Nvidia. The move would
combine Intel’s industry-leading chip fabrication processes with ARM’s highly
efficient mobile designs, and the joint synergies could potentially shake up
the entire semiconductor industry. Let’s take a closer look to have a better
understanding of it all.
- Intel recently struck a licensing agreement with ARM to manufacture its chips.
- The Move could boost Intel's revenues significantly.
- It could also bring upon a cash crunch on Intel's competitors, that could ultimately slow down their rate of progression.
Welcoming
ARM, with arms wide open
Let
me start by saying that Intel has had the world’s most advanced chip
fabrication technologies for several years now. It’s manufacturing lead was as
long as 18 months, back in 2014 and the chipzilla is expected to still stay
ahead of its peers (Taiwan Semiconductor, GlobalFoundries and Samsung) at least
up till 2018. Intel’s competitors were thriving till date due to increasing
business from ARM, but now that Intel has entered the scene with similar
intentions, the bulk of this business would pretty much go to the chipzilla due
to its manufacturing lead. After all, in the cut throat semiconductor industry,
everyone would want their performance chips to be manufactured on the latest
nodes.
2015 Rank
|
2014 Rank
|
Vendor
|
2015 Revenue
|
2015 Market Share (%)
|
2014 Revenue
|
2015-2014 Growth (%)
|
1
|
1
|
TSMC1
|
26,566
|
54.3
|
25,175
|
5.5
|
2
|
3
|
Globalfoundries2
|
4,673
|
9.6
|
4,400
|
6.2
|
3
|
2
|
UMC3
|
4,561
|
9.3
|
4,621
|
-1.3
|
4
|
4
|
Samsung Electronics4
|
2,607
|
5.3
|
2,412
|
8.1
|
5
|
5
|
SMIC
|
2,229
|
4.6
|
1,970
|
13.1
|
6
|
6
|
Powerchip Technology5
|
985
|
2
|
917
|
7.4
|
7
|
7
|
TowerJazz
|
961
|
2
|
828
|
16.1
|
8
|
10
|
Fujitsu Semiconductor
|
845
|
1.7
|
653
|
29.4
|
9
|
8
|
Vanguard International
|
736
|
1.5
|
790
|
-6.9
|
10
|
9
|
Shanghai Huahong Grace Semiconductor
|
651
|
1.3
|
665
|
-2
|
Top 10 for 2015
|
44,814
|
91.7
|
42,431
|
5.6
|
||
Others
|
4,077
|
8.3
|
4,281
|
-7
|
||
Total Market
|
48,891
|
100
|
46,812
|
4.4
|
·
- The global semiconductor foundry
business is estimated to be around $48.8 billion in
size. If Intel manages to slice up even 10% of this market, which shouldn’t be
that hard since it currently has the world’s most-advanced chip fabrication
technologies, its incremental revenues could be to the tune of $4.8 billion.
That’s a significant bump in its top-line, representing an increase of about
8.7% over its FY15 revenue. So its needless to say that Intel would be
opening a big revenue stream with this move. Intel can later use this
additional cash flow to fund its race to global 5G domination.
· -
More to the point, the semiconductor
industry requires billions of spending each year, earmarked towards improving
manufacturing technologies. If Intel manages to take away a sizable market
share from Taiwan Semiconductor and GlobalFoundries, then the their constrained
cash flows could hamper their R&D and capex spending, and ultimately result
in their growth slowdown. So the move to manufacture ARM chips not only serves
as an incremental revenue driver for Intel, but also limits the growth of its
foundry competitors. Talk about taking down two targets with one blow.
·
- Also, once Intel starts manufacturing
ARM-based chips, its factory utilization rate and production volumes would
increase. This should allow the chipmaker to attain better economies of scale,
improve its manufacturing efficiency and at the end of the day, it would become
easier for Intel to keep its fabs busy with the onset of this deal. Its foundry
operations for ARM-based chipmakers would act as a hedge against the slowing
down PC sales. These benefits should translate into better gross margins.
·
- And lastly, the move allows Intel to
capitalize on the mobile opportunity, while it still can. The chipzilla won’t
have to design its own Atom chips for mobile devices anymore in order to tap
the smartphone/tablet segment. So Intel would now be able to cater to the
mobile market, without having to invest billions in contra revenue or
mobile-related R&D spending. I believe that this is a low-risk, high-reward
opportunity for Intel and its shareholders.
Tempering excitement
Just like any other business move,
this one brings its own set of challenges and limitations as well.
· -
First of all, Intel won’t be a
chipmaker like Qualcomm, Apple or Nvidia. It will just be a foundry catering to
other fabless firms. This pretty much means that Intel’s revenue would be
limited to its production volume, regardless of how profitable or popular those
chips become. So its revenue stream could end up being as volatile and seasonal
as Micron’s.
·
- Secondly, if Intel continues in this
direction, it might also end up opening its foundry business to ARM-based
server chipmakers such as Cavium, AMD and Qualcomm. This may prove to be a
death knell for Intel’s highly profitable x86 server business. It could fuel
the growth of ARM servers and there’s a solid chance that they’d end up
cannibalizing Intel’s Xeon sales. So Intel must not head in this direction.
·
- More to the point, Intel’s excess
fabs aren’t running 10nm processes. Manufacturing 10nm chips on large scale
volume by 2018 would require a lot of retooling on Intel’s part. This would
most certainly bump up chipzilla’s capital expenditures over the next few
years, without providing any sort of guarantee that fabless chipmakers would
pick Intel for their manufacturing needs.
Putting it all together
Intel finally realized that other
foundries are its competitors as well. If the chipzilla succeeds in taking
business away from them, it would bring upon a cash crunch and ultimately slow
down the rate of progress of competition. So the move not only stands to boost
Intel’s revenues, but can also potentially impede the growth of its
competition. I see this as an excellent business move forward for Intel and its
shareholders.
ARM
and Fujitsu today announced a scalable vector extension (SVE) to the
ARMv8-A architecture intended to enhance ARM capabilities in HPC
workloads. Fujitsu is the lead silicon partner in the effort (so far)
and will use ARM with SVE technology in its post K computer, Japan’s
next flagship supercomputer planned for the 2020 timeframe. This is an
important incremental step for ARM, which seeks to push more
aggressively into mainstream and HPC server markets.
Fujitsu
first announced plans to adopt ARM for the post K machine – a switch from SPARC
processor technology used in the K computer – at ISC2016 and said at the time
that it would reveal more at Hot Chips about the ARM development effort needed.
Bull Atos is also developing an ARM-based supercomputer.
The
SVE is focused on addressing “next generation high performance computing
challenges and by that we mean workloads typically found in scientific
computing environment where they are very parallelizable,” said Ian Smythe,
director of marketing programs, ARM Compute Products Group, in a pre-briefing.
SVE is scalable from 128-bits to 2048-bits in 128-bit increments and, among
other things, should enhance ARM’s ability to exploit fine grain parallelism.
Nigel
Stephens, lead ISA architect and ARM Fellow, provided more technical detail in
his blog (Technology Update: The Scalable Vector Extension (SVE) for the
ARMv8-A Architecture, link below) coinciding with his Hot Chips presentation.
It’s worth reading for a fast but substantial summary.
“Rather
than specifying a specific vector length, SVE allows CPU designers to choose
the most appropriate vector length for their application and market, from 128
bits up to 2048 bits per vector register,” wrote Stephens. “SVE also supports a
vector-length agnostic (VLA) programming model that can adapt to the available
vector length. Adoption of the VLA paradigm allows you to compile or hand-code
your program for SVE once, and then run it at different implementation performance
points, while avoiding the need to recompile or rewrite it when longer vectors
appear in the future. This reduces deployment costs over the lifetime of the
architecture; a program just works and executes wider and faster.
“Scientific
workloads, mentioned earlier, have traditionally been carefully written to
exploit as much data-level parallelism as possible with careful use of OpenMP
pragmas and other source code annotations. It’s therefore relatively
straightforward for a compiler to vectorize such code and make good use of a
wider vector unit. Supercomputers are also built with the wide, high- bandwidth
memory systems necessary to feed a longer vector unit,” wrote Stephens.
He
notes that scientific workloads have traditionally been written to exploit as
much data-level parallelism as possible with careful use of OpenMP pragmas and
other source code annotations. “It’s relatively straightforward for a compiler
to vectorize such code and make good use of a wider vector unit. Supercomputers
are also built with the wide, high- bandwidth memory systems necessary to feed
a longer vector unit.”
While
HPC is a natural fit for SVE’s longer vectors, said Stephens, it also offers an
opportunity to improve vectorizing compilers that will be of general benefit
over the longer term as other systems scale to support increased data level
parallelism.
Amplifying
on the point, he wrote, “It is worth noting at this point that Amdahl’s Law
tells us that the theoretical limit of a task’s speedup is governed by the amount
of unparallelizable code. If you succeed in vectorizing 10 percent of your
execution and make that code run four times faster (e.g. a 256-bit vector
allows 4x64b parallel operations), then you reduce 1000 cycles down to 925
cycles and provide a limited speedup for the power and area cost of the extra
gates. Even if you could vectorize 50 percent of your execution infinitely
(unlikely!) you’ve still only doubled the overall performance. You need to be
able to vectorize much more of your program to realize the potential gains from
longer vectors.”
The
ARMv7 Advanced SIMD (aka the ARM NEON) is now about 12 years old and was
originally intended to accelerate media processing tasks on the main processor.
With the move to AArch64, NEON gained full IEEE double-precision float, 64-bit
integer operations, and grew the register file to thirty-two 128-bit vector
registers. These changes, says Stephens, made NEON a better compiler target for
general-purpose compute. SVE is a complementary extension that does not replace
NEON, and was developed specifically for vectorization of HPC scientific
workloads, he says.
Snapshot of new SVE features compared to NEON:
- Scalable vector length (VL)
- VL agnostic (VLA) programming
- Gather-load & Scatter-store
- Per-lane predication
- Predicate-driven loop control and management
- Vector partitioning and SW managed speculation
- Extended integer and floating- point horizontal reductions
- Scalarized intra-vector sub-loops
Smythe
emphasized, “If you compile the code for SVE it will run on any
implementation of SVE regardless of the width, whether 128 or 1024 or
2048, and the hardware implementation, that code will run on ARM
architecture as a binary. That’s important and gives us scalability and
compatibility into the future for the compilers and the code that HPC
guys are writing.”
ARM has been steadily working to expand its ecosystem (shown here) with hopes of capturing a chunk of the broader x86 market. It has notable wins in many market segments, although the market traction has been tougher to gauge, and it is only in the past couple of years that server chips started to become available. Many design wins have been niche oriented; one example is an HPE ARM-based storage server (StoreVirtual 3200) announced earlier this month. ARM, of course, is a juggernaut in mobile computing.
Prior to the Hot Chips conference, with its distinctly technical focus, ARM was pre-briefing some of the HPC community about SVE and using the opportunity to reinforce its mission of growth, its success in ecosystem building, and to bask in some of the glory of the post K computer win. Given the recent acquisition of ARM by SoftBank, it will be interesting to watch how the marketing and technical activities change, if at all.
Lakshmi Mandyam, senior marketing director, ARM Server Programs, said, “We’ve been focusing on enabling some base market segments to establish some beachheads and enable our partners to get adoption in those key areas. Also we have also been using key end users to drive our approach in terms of ecosystem enablement because clearly we are catching up with x86 in terms of software enablement.”
“The move to open source and consuming applications and workloads through [as-a-service models] is really driving a lot of disruption of the industry. It also presents an opportunity because a lot of those platforms are based on open source and Linux and or intermediate middleware and so the dependency on the legacy (x86) software and architectures is gone. That presents an opportunity to ARM.”
It’s also important, she said, to recognize that many modern workloads, even in HPC, are moving towards the scale out model as opposed to a purely scale up. Many of those applications are driven by IO and memory performance. “This where the ARM partnership can shine because we are able to deliver heterogeneous computing quite easily and we’re able to deliver optimized algorithm processing quite easily. If you look at a lot of these applications, it’s not about spec and benchmark performance; it’s about what can you deliver in my application.”
“When you think about Fujitsu, as they talked about the post K computer, a lot of the folks are looking for this really tuned performance, to take a codesign approach where they are looking at the entire problem, and to deliver an application and service for a given problem. This is where their ability to tune platforms down to the silicon level pays big dividends,” she said.
Here’s a link to Nigel Stephens’ blog on the ARM SVE anouncment (Technology Update: The Scalable Vector Extension (SVE) for the ARMv8-A Architecture): https://community.arm.com/groups/processors/blog/2016/08/22/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture
ARM has been steadily working to expand its ecosystem (shown here) with hopes of capturing a chunk of the broader x86 market. It has notable wins in many market segments, although the market traction has been tougher to gauge, and it is only in the past couple of years that server chips started to become available. Many design wins have been niche oriented; one example is an HPE ARM-based storage server (StoreVirtual 3200) announced earlier this month. ARM, of course, is a juggernaut in mobile computing.
Prior to the Hot Chips conference, with its distinctly technical focus, ARM was pre-briefing some of the HPC community about SVE and using the opportunity to reinforce its mission of growth, its success in ecosystem building, and to bask in some of the glory of the post K computer win. Given the recent acquisition of ARM by SoftBank, it will be interesting to watch how the marketing and technical activities change, if at all.
Lakshmi Mandyam, senior marketing director, ARM Server Programs, said, “We’ve been focusing on enabling some base market segments to establish some beachheads and enable our partners to get adoption in those key areas. Also we have also been using key end users to drive our approach in terms of ecosystem enablement because clearly we are catching up with x86 in terms of software enablement.”
“The move to open source and consuming applications and workloads through [as-a-service models] is really driving a lot of disruption of the industry. It also presents an opportunity because a lot of those platforms are based on open source and Linux and or intermediate middleware and so the dependency on the legacy (x86) software and architectures is gone. That presents an opportunity to ARM.”
It’s also important, she said, to recognize that many modern workloads, even in HPC, are moving towards the scale out model as opposed to a purely scale up. Many of those applications are driven by IO and memory performance. “This where the ARM partnership can shine because we are able to deliver heterogeneous computing quite easily and we’re able to deliver optimized algorithm processing quite easily. If you look at a lot of these applications, it’s not about spec and benchmark performance; it’s about what can you deliver in my application.”
“When you think about Fujitsu, as they talked about the post K computer, a lot of the folks are looking for this really tuned performance, to take a codesign approach where they are looking at the entire problem, and to deliver an application and service for a given problem. This is where their ability to tune platforms down to the silicon level pays big dividends,” she said.
Here’s a link to Nigel Stephens’ blog on the ARM SVE anouncment (Technology Update: The Scalable Vector Extension (SVE) for the ARMv8-A Architecture): https://community.arm.com/groups/processors/blog/2016/08/22/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture
